Search - fpga phy

[Other resource] fpga_mac_vhdl

Description: 针对嵌入式系统的底层网络接口给出了一种由FPGA实现的以太网控制器的设计方法．该控制器能支持10Mbps和100Mbps的传输速率以及半双工和全双工模式，同时可提供MII接口，可并通过外接以太网物理层（PHY）芯片来实现网络接入
Platform: | Size: 316737 | Author: 林大朋 | Hits:

[Other] fpga_mac_vhdl

Description: 针对嵌入式系统的底层网络接口给出了一种由FPGA实现的以太网控制器的设计方法．该控制器能支持10Mbps和100Mbps的传输速率以及半双工和全双工模式，同时可提供MII接口，可并通过外接以太网物理层（PHY）芯片来实现网络接入 -Embedded systems for the bottom of this paper, a network interface from FPGA to achieve the Ethernet controller design method. The controller will support the 10Mbps and 100Mbps transfer rate, as well as half-duplex and full-duplex mode, at the same time provides MII interface, and through external Ethernet physical layer (PHY) chip to achieve network access
Platform: | Size: 316416 | Author: 林大朋 | Hits:

[VHDL-FPGA-Verilog] sata_device_model

Description: sata_device_model,对做硬盘控制器的朋友有帮助-sata_device_model, to make the hard disk controller has a friend help
Platform: | Size: 17412096 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] mdio-md

Description: 目前以太网PHY芯片是通过总线MDC/MDIO，但是基本上是通过MAC芯片直接管理的，本代码实现了通过FPGA管理PHY。即由FPGA完成MII管理-At present, Ethernet PHY chip through the bus MDC/MDIO, but basically through the direct management of MAC chip, the code through the FPGA implementation management PHY. FPGA completed by the MII management
Platform: | Size: 2048 | Author: leon | Hits:

[Embeded-SCM Develop] fpga

Description: fpga+sdram+PHY 芯片设计原理图-fpga+ sdram+ PHY chip design schematic
Platform: | Size: 64512 | Author: liulei | Hits:

[Communication] 80211b-simlink

Description: 802.11b simulink simulation source code for PHY layer. It can be used to generate bit-true test vector for RTL level design(FPGA).
Platform: | Size: 88064 | Author: freedragon | Hits:

[Program doc] wp_wimax

Description: WiMAX, or the IEEE 802.16 standard for broadband wireless access, is increasingly gaining in popularity as a technology with significant market potential. This paper first provides an overview of the existing and developing 802.16 standards and their key differences/applications. The PHY and MAC layers of a typical WiMAX base station are then described. The associated implementation challenges faced by WiMAX infrastructure developers, including performance/cost/flexibility trade-offs in the choice of silicon, are clearly outlined. The paper then describes how FPGA-based system implementation can address these challenges including the “accelerated time-to-market” requirement which is considered a key enabler for early success in this market. As an example design, the physical layer implementation of the 802.16d standard with Altera FPGAs and intellectual property (IP) is proposed.
Platform: | Size: 473088 | Author: greg | Hits:

[Internet-Network] TCPIPGuide_2-0_s9

Description: WiMAX, or the IEEE 802.16 standard for broadband wireless access, is increasingly gaining in popularity as a technology with significant market potential. This paper first provides an overview of the existing and developing 802.16 standards and their key differences/applications. The PHY and MAC layers of a typical WiMAX base station are then described. The associated implementation challenges faced by WiMAX infrastructure developers, including performance/cost/flexibility trade-offs in the choice of silicon, are clearly outlined. The paper then describes how FPGA-based system implementation can address these challenges including the “accelerated time-to-market” requirement which is considered a key enabler for early success in this market. As an example design, the physical layer implementation of the 802.16d standard with Altera FPGAs and intellectual property (IP) is proposed.
Platform: | Size: 211968 | Author: greg | Hits:

[VHDL-FPGA-Verilog] m-mtip-10_100_1000_ethermac

Description: 10/100 0M以太网MAC解决方案，是IP核的相关说明，利用ALTERA的FPGA设计，QUARTUS软件为开发平台。-10/100/1000M Ethernet MAC solution is the IP core instructions, using ALTERA' s FPGA design, QUARTUS software development platform.
Platform: | Size: 43008 | Author: 天一生水 | Hits:

[VHDL-FPGA-Verilog] check_net_test

Description: 用来检查FPGA通过PHY发送数据时是否有掉帧的现象-FPGA is used to check whether the PHY sends the data out of the frame with the phenomenon of
Platform: | Size: 1024 | Author: CHEN HAO | Hits:

[VHDL-FPGA-Verilog] MII

Description: 以太网MII芯片配置接口的VHDL设计，配置PHY芯片的模块设计-Ethernet MII chip configuration interface VHDL design, configuration PHY chip module design
Platform: | Size: 2048 | Author: 雷伟林 | Hits:

[VHDL-FPGA-Verilog] DM9000A

Description: DM900 100M物理层PHY芯片FPGA连接，fpga实现数据链路层功能，完成网络数据的收发-DM900 100M physical layer PHY chip FPGA connections, fpga data link layer, the completion of the network to send and receive data
Platform: | Size: 18432 | Author: zhangqiang | Hits:

[VHDL-FPGA-Verilog] usb_phy_latest.tar

Description: USB phy latest for design USB by FPGA
Platform: | Size: 11264 | Author: trung | Hits:

[VHDL-FPGA-Verilog] USB_fpga

Description: FPGA与USB PHY芯片Cy7c68013A通信的程序，Verilog语言-FPGA and USB PHY chip Cy7c68013A communication procedures, Verilog language
Platform: | Size: 4371456 | Author: 路永轲 | Hits:

[VHDL-FPGA-Verilog] phyjingjian

Description: 通过fpga对phy芯片88e1111进行控制，可改变工作模式，传输速度等。-By fpga control of phy chip 88e1111 can change the working mode, the transmission speed.
Platform: | Size: 5152768 | Author: wanzhuan | Hits:

[Software Engineering] DE2_NET

Description: DE2开发板例程源码，FPGA:EP2C35F256C6，代码基于quartus II 9.0以上的版本（随板光盘的为7.2的版本，在9.0以上的版本上编译通不过会报错）。该代码主要功能为FPGA对以太网通信，与PC机通信-In this demonstration, we will show how to send and receive Ethernet packets using the Fast Ethernet controller on DE2 board. We use the Nios II processor to send and receive Ethernet packets using the DM9000A Ethernet PHY/MAC Controller.
Platform: | Size: 1950720 | Author: chenxin | Hits:

[VHDL-FPGA-Verilog] help_lib

Description: 1.JESD204B协议 2.Xilinx的JESD204B phy 核手册 3.Xilinx的JESD204B rx_tx 核手册7.1 4.Xilinx的JESD204B rx_tx 核手册7.2 5.verilog实现串口发送(1.JESD204B protocol 2.Xilinx JESD204B PHY core manual 3.Xilinx JESD204B rx_tx core manual 7.1 4.Xilinx JESD204B rx_tx core manual 7.2 5.verilog to achieve serial transmission)
Platform: | Size: 7014400 | Author: Nanke42 | Hits:

[Internet-Network] 100G以太网PCS子层研究及其在FPGA的实现

Description: 主要描述了100G以太网物理层在XILINX FPGA上的实现方式(100G Ethertnet PHY, XILINX FPGA, Vivado)
Platform: | Size: 3593216 | Author: wanghuawen | Hits:

[VHDL-FPGA-Verilog] DBSTAR_RGMII

Description: Verilog实现的RGMII和GMII接口转接，适合适配不同PHY芯片接口使用(Verilog implementation of RGMII and GMII interface transfer)
Platform: | Size: 5140480 | Author: zhzp | Hits:

[Other] rgmii_image

Description: 通过RGMII协议驱动的PHY芯片完成千兆以太网收发，包括ARP响应(With RGMII driving PHY IC to finish the internet communication)
Platform: | Size: 4355072 | Author: MAOMAOSA | Hits:

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